Category: Business

RISC-V is an exciting new open source processor design which will be of particular interest to developers of custom IP. This short overview will help you understand RISC-V,  its eco system, and the opportunities it presents.

RISC-V Foundation

• The RISC-V Foundation is the governing body and holder of IP. https://riscv.org/

Technical Overview

• Wikipedia has a good technical overview, including a list of open-source implementations which could be useful for bootstraping a project instead of starting from scratch with the low-level instruction set specification (the “ISA”). https://en.wikipedia.org/wiki/RISC-V

Some RISC-V Users

• Google’s OpenTitan project seeks to provide an open-source silicon root of trust (RoT) using a RISC-V-based RoT design with integration guidelines for use in data center servers, storage devices and peripherals. https://opentitan.org/
• Kneron is a California-based company known for its impressive line of AI SoCs. Kneron’s KL530 targets the autonomous vehicle edge computing market specifically. In addition to a RISC-V AI-coprocessor, the chip also includes a neural processing unit, a Cortex M4 core for system control, an image signal processor, and a dedicated security block. https://www.allaboutcircuits.com/news/knerons-risc-v-ai-chip-intends-to-bring-level-1-and-level-2-autonomy-to-any-vehicle
• Western Digital is moving its consumption of IP cores (1B per year!) to RISC-V, as well as offering commercial RISC-V IP. https://www.westerndigital.com/en-ca/solutions/business/risc-v
• SiFive provides three families of RISK-V IP, covering high-performance application processors, area-optimized, low-power embedded 64- and 32-bit microcontrollers, as well as vector processors. https://www.sifive.com/blog/risc-v-chiplets-disaggregated-die-and-tiles
• Apple posted in September for a “RISC-V High Performance Programmer” to work in their Vector and Numerics Group (which is responsible for “designing, enhancing and improving various embedded subsystems running on iOS, macOS, watchOS and tvOS.”). Candidates should be experienced with RISC-V architectures, and ideally have a working knowledge of NEON micro architecture in ARM CPU cores. https://appleinsider.com/articles/21/09/03/apple-investigating-risc-v-processor-architecture-job-listing-shows

Mentions in Popular Media

• “Open Source Hardware: The Rise of RISC-V”, an interview with Calista Redmond, chief executive of the RISC-V Foundation. https://thenewstack.io/open-source-hardware-the-rise-of-risc-v/
• “RISC-V grows globally as an alternative to Arm and its license fees”. https://venturebeat.com/2019/12/11/risc-v-grows-globally-as-an-alternative-to-arm-and-its-license-fees/ (the RISC-V Summit in 2019 reportedly had 2000 attendees)
• “RISC-V, the Linux of the chip world. https://www.zdnet.com/article/risc-v-the-linux-of-the-chip-world-is-starting-to-produce-technological-breakthroughs/
• Gartner Market Trends report “Custom ICs Based on RISC-V Will Enable Cost-Effective IoT Product Differentiation” https://www.gartner.com/doc/reprints?id=1-1Z8EWG75&ct=200612&st=sb

Examples of Development Boards

• https://riscv.org/exchange/boards/
• https://www.digikey.ca/en/resources/risc-v

Software Development

• Mindchasers describes building a software toolchain with links to their RISC-V FPGA project and other resources. https://mindchasers.com/dev/rv-getting-started

Please let me know in the comments section if you have found this overview useful,